PIC18F87J60-I/PT

Product Summary

The PIC18F87J60-I/PT is a 80-Pin High-Performance, 1-Mbit Flash Microcontroller with Ethernet.

Parametrics

PIC18F87J60-I/PT absolute maximum ratings: (1)Ambient temperature under bias: -40 to +100℃; (2)Storage temperature: -65 to +150℃; (3)Voltage on any digital only input pin or MCLR with respect to VSS (except VDD): -0.3V to 6.0V; (4)Voltage on any combined digital and analog pin with respect to VSS: -0.3V to (VDD + 0.3V); (5)Voltage on VDDCORE with respect to VSS: -0.3V to 2.75V; (6)Voltage on VDD with respect to VSS: -0.3V to 4.0V; (7)Total power dissipation: 1.0W; (8)Maximum current out of VSS pin: 300 mA; (9)Maximum current into VDD pin: 250 mA; (10)Input clamp current, IIK (VI < 0 or VI > VDD): ±0mA; (11)Output clamp current, IOK (VO < 0 or VO > VDD): ±0mA; (12)Maximum output current sunk by any PORTB and PORTC I/O pins: 25 mA; (13)Maximum output current sunk by any PORTD, PORTE and PORTJ I/O pins: 8 mA; (14)Maximum output current sunk by any PORTA, PORTF, PORTG and PORTH I/O pins: 2 mA; (15)Maximum output current sourced by any PORTB and PORTC I/O pins: 25 mA; (16)Maximum output current sourced by any PORTD, PORTE and PORTJ I/O pins: 8 mA; (17)Maximum output current sourced by any PORTA, PORTF, PORTG and PORTH I/O pins: 2 mA; (18)Maximum current sunk by all ports combined: 200 mA; (19)Maximum current sourced by all ports combined: 200 mA.

Features

PIC18F87J60-I/PT features: (1)Integrated MAC and 10Base-T PHY; (2)8-Kbyte Transmit/Receive Packet Buffer SRAM; (3)Supports One 10Base-T Port; (4)Programmable Automatic Retransmit on Collision; (5)Programmable Padding and CRC Generation; (6)Programmable Automatic Rejection of Erroneous Packets; (7)Activity Outputs for 2 LED Indicators; (8)High-Current Sink/Source: 25 mA/25 mA on PORTB and PORTC; (9)Five Timer modules (Timer0 to Timer4); (10)Four External Interrupt pins; (11)Two Capture/Compare/PWM (CCP) modules; (12)5.5V Tolerant Inputs (digital-only pins); (13)Low-Power, High-Speed CMOS Flash Technology: Self-reprogrammable under software control; (14)C compiler Optimized Architecture for Reentrant Code; (15)Power Management Features: Run: CPU on, peripherals on; Idle: CPU off, peripherals on; Sleep: CPU off, peripherals off; (16)Priority Levels for Interrupts; (17)8 x 8 Single-Cycle Hardware Multiplier; (18)Extended Watchdog Timer (WDT): Programmable period from 4 ms to 134s; (19)Single-Supply 3.3V In-Circuit Serial Programming?(ICSP) via Two Pins; (20)In-Circuit Debug (ICD) with 3 Breakpoints via Two Pins; (21)Operating Voltage Range of 2.35V to 3.6V (3.1V to 3.6V using Ethernet module); (22)On-Chip 2.5V Regulator.

Diagrams