PIC18F6680-I/L

Product Summary

The PIC18F6680-I/L is a 68-Pin High-Performance, 64-Kbyte Enhanced Flash Microcontroller with ECAN Module.

Parametrics

PIC18F6680-I/L absolute maximum ratings: (1)Ambient temperature under bias: -55 to +125℃; (2)Storage temperature: -65 to +150℃; (3)Voltage on any pin with respect to VSS (except VDD, MCLR, and RA4): -0.3V to (VDD + 0.3V); (4)Voltage on VDD with respect to VSS: -0.3V to +5.5V; (5)Voltage on MCLR with respect to VSS: 0V to +13.25V; (6)Voltage on RA4 with respect to Vss: 0V to +8.5V; (7)Total power dissipation: 1.0W; (8)Maximum current out of VSS pin: 300 mA; (9)Maximum current into VDD pin: 250 mA; (10)Input clamp current, IIK (VI < 0 or VI > VDD): ±20 mA; (11)Output clamp current, IOK (VO < 0 or VO > VDD): ±20 mA; (12)Maximum output current sunk by any I/O pin: 25 mA; (13)Maximum output current sourced by any I/O pin: 25 mA; (14)Maximum current sunk by all ports: 200mA; (15)Maximum current sourced by all ports: 200 mA.

Features

PIC18F6680-I/L features: (1)Source code compatible with the PIC16 and PIC17 instruction sets; (2)Linear program memory addressing to 2 Mbytes; (3)Linear data memory addressing to 4096 bytes ; (4)1 Kbyte of data EEPROM; (5)Up to 10 MIPs operation: DC – 40 MHz osc./clock input; 4 MHz-10 MHz osc./clock input with PLL active; (6)16-bit wide instructions, 8-bit wide data path; (7)Priority levels for interrupts ; (8)31-level, software accessible hardware stack; (9)8 x 8 Single-Cycle Hardware Multiplier; (10)High current sink/source 25 mA/25 mA; (11)Four external interrupt pins; (12)Timer0 module: 8-bit/16-bit timer/counter ; (13)Timer1 module: 16-bit timer/counter ; (14)Timer2 module: 8-bit timer/counter ; (15)Timer3 module: 16-bit timer/counter ; (16)Secondary oscillator clock option – Timer1/Timer3; (17)Message bit rates up to 1 Mbps; (18)Conforms to CAN 2.0B ACTIVE Specification; (19)Fully backward compatible with PIC18XXX8 CAN modules; (20)Three modes of operation: Legacy, Enhanced Legacy, FIFO; (21)Three dedicated transmit buffers with prioritization; (22)Two dedicated receive buffers; (23)Six programmable receive/transmit buffers; (24)Three full 29-bit acceptance masks; (25)16 full 29-bit acceptance filters with dynamic association; (26)DeviceNet data byte filter support; (27)Automatic remote frame handling; (28)Advanced Error Management features.

Diagrams