(China (Mainland))
Product Summary
The FDC654P is a P-Channel logic level enhancement mode power field effect transistor. It is produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. The FDC654P is particularly suited for low voltage applications such as cellular phone and notebook computer power management and other battery powered circuits where high-side switching, and low in-line power loss are needed in a very small outline surface mount package.
Parametrics
FDC654P absolute maximum ratings: (1)VDSS Drain-Source Voltage: -30 V; (2)VGSS Gate-Source Voltage - Continuous: ±20 V; (3)ID Drain Current: -3.6 A; (4)PD Maximum Power Dissipation: 1.6 W; (5)TJ,TSTG Operating and Storage Temperature Range: -55 to 150℃.
Features
FDC654P features: (1)-3.6 A, -30 V. RDS(ON)= 0.075Ω @ VGS = -10 V; RDS(ON)= 0.125 Ω @ VGS = -4.5 V; (2)SuperSOTTM-6 package design using copper lead frame for superior thermal and electrical capabilities; (3)High density cell design for extremely low RDS(ON); (4)Exceptional on-resistance and maximum DC current capability.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
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 FDC654P |
Fairchild Semiconductor |
MOSFET SSOT-6 P-CH -30V |
Data Sheet |
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